ΨΗΦΙΑΚΗ ΣΧΕΔΙΑΣΗ
Έγγραφα
Τύπος | Aρχείο ![]() | Μέγεθος | Ημερομηνία | |
---|---|---|---|---|
Intro | 2.34 MB | 25/9/24 | ||
Lab 01: Multisim Circuit Simulation and Basic Gates | 2.7 MB | 23/9/24 | ||
Lab 01: Multisim installation | 1.88 MB | 23/9/24 | ||
Lab 02: Truth Tables and Basic Logic Gates | 1.18 MB | 23/9/24 | ||
Lab 02: Verilog (Μέρος 1) | 2.08 MB | 23/9/24 | ||
Lab 02: Verilog Icarus | 2.4 MB | 9/10/24 | ||
Lab 03: Logic Gates Explored and Boolean Algebra | 2.22 MB | 25/10/24 | ||
Lab 03: Verilog (Μέρος 2) | 2.03 MB | 14/10/24 | ||
Lab 04: Icarus Verilog & GTKWave | 1.67 MB | 23/9/24 | ||
Lab 04: Karnaugh Maps | 1.13 MB | 23/10/24 | ||
Lab 04: Verilog (Μέρος 3) | 2.37 MB | 23/9/24 | ||
Lab 05: Binary Conversion and Adders | 1.72 MB | 29/10/24 | ||
Lab 05: Visual Studio Code | 1.19 MB | 29/10/24 | ||
Lab 06: Encoders and Decoders | 1.13 MB | 23/9/24 | ||
Lab 07: Multiplexers and Demultiplexers | 980.89 KB | 23/9/24 | ||
Lab 08: Latches and Sequential Logic Circuits | 2.33 MB | 19/11/24 | ||
Lab 08: Verilog (Μέρος 4) | 1.69 MB | 25/11/24 | ||
Lab 09: Flip-Flops | 1.35 MB | 18/11/24 | ||
Lab 10: Sequential Circuits - FSM | 5.62 MB | 11/12/24 | ||
Lab 10: Verilog (Μέρος 5 - FSM) | 1.39 MB | 25/11/24 |