library (ece327Library) {

  /* Documentation Attributes */
  date                    		: "Mon 16 Jan 2023, 18:11:58";
  revision                		: "revision 1.0";
  comment                 		: "ECE327 UTH TEMPLATE LIBERTY";

  /* General Attributes */
   delay_model : table_lookup;

   nom_process     : 1.0;
   nom_temperature : 125;
   nom_voltage     : 2.5;

   time_unit               : "1ns";
   voltage_unit            : "1V";
   current_unit            : "1mA";
   pulling_resistance_unit : "1kohm";
   leakage_power_unit      : "1pW";
   capacitive_load_unit(1, pf);

/* Library Description: Default Attributes */

   default_output_pin_cap       : 0.0;
   default_inout_pin_cap        : 1.0;
   default_input_pin_cap        : 1.0;
   default_fanout_load          : 1.0;
   default_cell_leakage_power   : 0.0;
   default_max_transition       : 10;

   in_place_swap_mode : match_footprint;
 
/* Library Operating Conditions */
 
   operating_conditions(SLOW) {
      process     :  1.0 ;
      temperature :  125 ;
      voltage     :  2.5 ;
      tree_type   : balanced_tree ;
   }
  
   default_operating_conditions : SLOW ;

/* TLF atributes */
  default_leakage_power_density  : 0.0;
  slew_derate_from_library : 1;
  slew_lower_threshold_pct_fall  : 30.0;
  slew_upper_threshold_pct_fall  : 70.0;
  slew_lower_threshold_pct_rise  : 30.0;
  slew_upper_threshold_pct_rise  : 70.0;
  input_threshold_pct_fall : 50.0;
  input_threshold_pct_rise : 50.0;
  output_threshold_pct_fall   : 50.0;
  output_threshold_pct_rise   : 50.0;

/* Library Look_Up Tables Templates */

   lu_table_template(Timing_template_6_7) {
      variable_1 : total_output_net_capacitance;
      variable_2 : input_net_transition;
      index_1 ("0.0017, 0.0062, 0.0232, 0.0865, 0.3221, 1.2");
      index_2 ("0.0042, 0.0307, 0.0768, 0.192, 0.48, 1.2, 3");
  }

   lu_table_template(Constraint_5_5) {
      variable_1 : related_pin_transition;
      variable_2 : constrained_pin_transition;
      index_1 ("0.0042, 0.0307, 0.0768, 0.48, 3");
      index_2 ("0.0042, 0.0307, 0.0768, 0.48, 3");
   }


  /******************************************************************************************
   Module          	: NAND2_X1
   Cell Description	: Combinational cell (NAND2_X1) with drive strength X1
  *******************************************************************************************/

  cell("NAND2_X1") {

		area : 0.0;
      pin("ZN") {
         direction : output;
         max_capacitance : 0.6064;
         function : "!(A2 * A1)";

         timing() {
            related_pin : "A2";
            timing_sense : negative_unate;
            cell_fall(Timing_template_6_7) {
	            index_1 ("0.0, 0.0, 0.0, 0.0, 0.0, 0.0");
	            index_2 ("0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0");
							values ("0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0");
            }
            /* ... */
         }
        /* ... */
      }
      pin("A2") {
         direction : input;
         capacitance : 0.0044;
      }
      pin("A1") {
         direction : input;
         capacitance : 0.0033;
      }
   }

  /******************************************************************************************
   Module          	: DFFRS_X1
   Cell Description	: Pos.edge D-Flip-Flop with active low reset, and active low set, and drive strength X1
  *******************************************************************************************/

  cell (DFFRS_X1) {
       ff("IQ0","IQN0") {
         next_state : "D";
         clocked_on : "CP";
         preset : "!(SDN)";
         clear : "!(CDN)";
      } 
		area : 0.0;
      pin("Q") {
         direction : output;
         max_capacitance : 0.2128;
         function : "IQ0";
         
         timing() {
            related_pin : "CP";
            timing_type : rising_edge;
            cell_rise(Timing_template_6_7) {
	            index_1 ("0.0, 0.0, 0.0, 0.0, 0.0, 0.0");
	            index_2 ("0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0");
							values ("0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0");
            }
            /* ... */
         }
        /* ... */

      }
      pin("D") {
         direction : input;
         capacitance : 0.0021;
         
         timing() {
            related_pin : "CP";
            timing_type : setup_rising;
            rise_constraint(Constraint_5_5) {
              index_1 ("0.0, 0.0, 0.0, 0.0, 0.0");
              index_2 ("0.0, 0.0, 0.0, 0.0, 0.0");
							values ("0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0", \
								"0.0, 0.0, 0.0, 0.0, 0.0");
            }
            /* ... */
         }
         /* ...  */

      }
      pin("CP") {
         clock : true;
		  	 direction : input;
         capacitance : 0.0035;
      }
      pin("SDN") {
         direction : input;
         capacitance : 0.0088;

         timing() {
            related_pin : "CP";
             timing_type : recovery_rising; 
            /* ... */
         }
         /* ... */
      }
      pin("CDN") {
         direction : input;
         capacitance : 0.0082;

         timing() {
            related_pin : "CP";
             timing_type : recovery_rising; 
            /* ... */
         }
         /* ... */
      }
   }

}
/*
* End of file
*/